x86/spec-ctrl: Extend repoline safey calcuations for eIBRS and Atom parts
authorAndrew Cooper <andrew.cooper3@citrix.com>
Fri, 3 May 2019 08:55:55 +0000 (10:55 +0200)
committerJan Beulich <jbeulich@suse.com>
Fri, 3 May 2019 08:55:55 +0000 (10:55 +0200)
commit3b062f5040a103d86b44c5e8412ff9555b00d06c
tree01f389e91903d876f737b5c75d50850780da9509
parent0825fbdd62724577febeff11ae50d440992a8f11
x86/spec-ctrl: Extend repoline safey calcuations for eIBRS and Atom parts

All currently-released Atom processors are in practice retpoline-safe, because
they don't fall back to a BTB prediction on RSB underflow.

However, an additional meaning of Enhanced IRBS is that the processor may not
be retpoline-safe.  The Gemini Lake platform, based on the Goldmont Plus
microarchitecture is the first Atom processor to support eIBRS.

Until Xen gets full eIBRS support, Gemini Lake will still be safe using
regular IBRS.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
master commit: 17f74242ccf0ce6e51c03a5860947865c0ef0dc2
master date: 2019-03-18 16:26:40 +0000
xen/arch/x86/spec_ctrl.c